SemiMap Analytical Systems
The COntactless REsistivity MApper designed for Wafer Topography (COREMA – WT) is a high performance diagnostic tool to characterize the resistivity of semi-insulating semiconductor wafers with utmost precision, repeatability and detail. Full wafer resistivity topograms discern fluctuations in the percent range with lateral resolution below 1 mm. It is used for routine production control as well as in-depth analysis supporting material development. Analytic methods to discern and quantify locally inhomogeneous material have been elaborated.
The COREMA – RM system determines the full set of electrical transport parameters (Resistivity, carrier Mobility and carrier concentration). It replaces completely the conventional Hall measurements by a contactless procedure which is vastly superior in speed and reproducibility. Data may be taken at any desired spot on wafers up to 200 mm.
The COREMA – VT system is designed to measure resistivity at Variable Temperature above RT up to 600 K. It is primarily used to characterize SiC wafer material for verification of high temperature specifications and for detailed analytic support of material development. Data may be taken at any desired spot on wafers up to 200 mm.
The COREMA – ER system is designed to measure thin epitaxial layers with intermediate resistivity, grown on high resistivity substrates (Epitaxial layer, Resistivity). The most important application presently appears to be the control and analysis of GaN buffer layers on s.i. SiC or Sapphire. The procedure is not applicable to evaluate conducting layers, as used in active devices (e.g. HEMTs). Presently layers with a resistance from 1E5 Ohm to 1E11 Ohm can be measured. Consequently, for a typical layer thickness of 1 µm, the measured resistivity range is 10 Ohm*cm to 1E7 Ohm*cm. The range shifts to lower (higher) resistivity for thinner (thicker) layers. As a side condition, the substrate resistance must be large compared to the layer resistance. For a 1 µm layer this means that the substrate resistivity must exceed the layer resistivity by at least a factor of 1E4. This condition can be relaxed if the substrate resistance is known and taken into account in the analysis.